There are two basic kinds of MOS transistors - enhancement and depletion. The enhancement device is made without a conductive path or channel between its source and drain electrodes and is normally non-conductive. If the gate electrode is raised toward drain potential, the semiconductor surface under the gate can be inverted when the potential is sufficient. This inversion creates a conductive path between source and drain and the device becomes conductive. The gate potential at which the device turns on is called threshold voltage or V.sub.T. Desirably this voltage is low, in the fractional volt region, but not so low that inadvertent or noise potentials will cause conduction.
In the depletion device a channel is created in manufacture between source and drain and such devices are normally on. Thus V.sub.T is below zero. Thus to turn a depletion device off, the gate potential must be driven below source potential. Also such devices can be made even more conductive by raising the gate potential toward drain potential. The channel doping level and geometry determine its initial conductivity.
To distinguish between the two kinds of MOS transistors, it has become standard practice to place a triangular symbol adjacent to all depletion devices on schematic diagrams.
FIG. 1 shows an inverter circuit typical of the prior art. Enhancement transistors 10 and 11 are series connected between V.sub.DD at terminal 12 and ground. The gate of transistor 10 is returned to its drain so that it acts like a resistor load device. When terminal 13 is driven toward V.sub.DD, transistor 11 will turn on when its V.sub.T is exceeded and it will pull output terminal 14 toward ground. When terminal 13 is driven toward ground, transistor 11 will be turned off when the input is below V.sub.T and transistor 10 will pull output terminal 14 toward V.sub.DD. Thus the output at terminal 14 is an inverted version of the input at terminal 13.
The actual conductivity of a transistor is a function of the channel width to length (W/L) dimensions in addition to the doping density and channel thickness. Conductivity is proportional to W/L. If transistor 11 is shaped or ratioed to be more conductive than transistor 10, it will pull the output at terminal 14 closer to ground. Thus if V.sub.DD is 5 volts and transistor 11 is nine times more conductive than transistor 10, the output will be pulled to about 0.5 volt when transistor 11 is on. When transistor 11 is off, transistor 10 will pull terminal 14 to one V.sub.T below V.sub.DD at which potential it will also turn off. If a V.sub.T of two volts (including body effect) is assumed, terminal 14 can only be pulled to about three volts by transistor 10 to give an output swing of 2.5 volts. In some circuit designs this swing is regarded as too limiting.
In the circuit of FIG. 2 a depletion transistor 15 (as indicated by the triangular symbol) is series connected with enhancement transistor. The gate is returned to the source so that the transistor acts like a resistor. In the case of FIG. 2, it can be seen that in the on state of transistor 11 the ratioing is the same as it was in FIG. 1 because both devices are on. A nine to one ratio will produce a 0.5 volt output using a five volt supply. However, since transistor 15 is always conductive, it can pull terminal 14 very close to V.sub.DD when transistor 11 is off. In other words, V.sub.T doesn't limit the output swing in FIG. 2.
In another sense it can be seen in FIG. 1 that V.sub.DD must exceed V.sub.T before the circuit can work at all. In FIG. 2, the circuit can function as an inverter at V.sub.DD levels below V.sub.T.
Thus it is clear that the circuit of FIG. 2 is often to be preferred. However, it is difficult to manufacture and optimize both depletion and enhancement transistors on the same substrate. A controlled resistivity substrate is required to make enhancement devices having a desired value of V.sub.T. It is desirable to have a relatively low substrate resistivity in all substrate areas where there are no transistors in order to avoid surface inversion under conductors located on top of the passivating oxide. In a depletion device a high resistivity substrate is desired in order to reduce the effect of the substrate bias on the channel region. Clearly the various requirements conflict and local variations in resistivity must be achieved in order to integrate devices on a single substrate. The prior art methods of combining enhancement and depletion devices on the same substrate have resulted in compromises that adversely affect device performance. In terms of processing, the prior art devices were ordinarily manufactured using a triple implant process. One implant was used to establish the enhancement transistor channel resistivity, a second implant used to establish the depletion transistor channel, and a third implant used to establish filed resistivity in the area around the transistors.